Georgia Tech - High Performance Computer Architecture
- Offered byUDACITY
High Performance Computer Architecture at UDACITY Overview
High Performance Computer Architecture
at UDACITY
Advance your career & demonstrate the marked advantage in your organization
Mode of learning | Online |
Schedule type | Self paced |
Difficulty level | Intermediate |
Official Website | Go to Website  |
Credential | Certificate |
High Performance Computer Architecture
Table of content
- Overview
- Highlights
- Course Details
- Curriculum
High Performance Computer Architecture at UDACITY Highlights
High Performance Computer Architecture
at UDACITY
- Real World Projects from Industry Experts
- Flexible Learning Program
- Self-Paced Learning
- 1-on-1 Technical Mentor & Career Coach
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High Performance Computer Architecture at UDACITY Course details
High Performance Computer Architecture
at UDACITY
What are the course deliverables?
- Enhance your skill set and boost your hirability through innovative, independent learning
- Self-Paced Learning
- Rich Learning Content
More about this course
- The course begins with a lesson on performance measurement, which leads to a discussion on the necessity of performance improvement.
- Pipelining, the first level of performance refinement, is reviewed. The weaknesses of pipelining will be exposed and explored, and various solutions to these issues will be studied. The student will learn hardware, software, and compiler based solutions to these issues.
High Performance Computer Architecture at UDACITY Curriculum
High Performance Computer Architecture
at UDACITY
Introduction and Trends
Computer Architecture & Tech Trends
Moore's Law
Processor Speed, Cost, Power
Power Consumption
Fabrication Yield
Performance Metrics and Evaluation
Measuring Performance
Benchmarks Standards
Iron Law of Performance
Amdahl's Law
Lhadma's Law
Pipelining Review
Pipeline CPI
Processor Pipeline Stalls
Data Dependencies
Pipelining Outro
Branches
Branch Prediction
Direction Predictor
Hierarchical Predictors
PShare
Predication
If Conversion
Conditional Move
MOVc Summary
Instruction Level Parallelism (ILP)
ILP Intro
RAW Dependencies
WAW Dependencies
Duplicating Register Values
Instruction Level Parallelism (ILP)
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