FPGA computing systems: Partial Dynamic Reconfiguration 

Course introduction

A Common Vocabulary

The 5 W's

Reconfigurable Computing as an Exstension of HW/SW Codesing

A Classification of SoC Reconfigurations

A Classification of SoMC Reconfigurations

Design methodology for partial dynamic reconfiguration: a new degree of freedom in the HW/SW codesign [suggested readings]

Performance of partial reconfiguration in FPGA systems: A survey and a cost model [suggested readings]

Functionalities and their implementations

Module Review

Scenarios where Partial Reconfiguration can be effective

How to use FPGA Reconfiguration to face area issues

How to deal with the Reconfiguration runtime overhead

Recurring modules to reuse them to reduce the Reconfiguration time

Partial Reconfiguration to reduce the Reconfiguration runtime overhead

Runtime management to explore alternative implementations

Bitstreams relocation

Bitstreams relocation and virtual homogeneity

Operating system runtime management of partially dynamically reconfigurable embedded systems [suggested readings]

Core Allocation and Relocation Management for a Self Dynamically Reconfigurable Architecture [suggested readings]

A runtime relocation based workflow for self dynamic reconfigurable systems design [suggested readings]

Partial Dynamic Reconfiguration in a Multi-FPGA Clustered Architecture Based on Linux [suggested readings]

Reconfigurable System

Partial reconfiguration

Xilnx Design Flows through years

Partial Reconfiguration Design Flows

Xilinx Difference Based Partial Reconfiguration

Xilinx Module Based Partial Reconfiguration

Xilinx Partial Reconfiguration (PR) Flow

Module Based vs Partial Reconfiguration Design Flows

Rationale behind DRESD and the work done by the Politecnico di Milano

From DRESD to CHANGE and ASAP, two new research initiatives from the Politecnico di Milano

CAOS: from embedded to heterogeneous distributed FPGA-based computing systems

Vivado Design Suite Tutorial, Partial Reconfiguration, UG947 (v2016.1) April 6, 2016 [suggested readings - handbook - PDF]

Vivado Design Suite User Guide, Partial Reconfiguration, UG909 (v2016.1) April 6, 2016 [suggested readings - handbook - PDF]

Dynamic Reconfigurability in Embedded System Design [suggested readings]

A design methodology for dynamic reconfiguration: the Caronte architecture [suggested readings]

Floorplanning Automation for Partial-Reconfigurable FPGAs via Feasible Placements Generation [suggested readings]

Heterogeneous exascale supercomputing: The role of CAD in the exaFPGA project [suggested readings]

The Role of CAD Frameworks in Heterogeneous FPGA-Based Cloud Systems [suggested readings]

Abstractions

Politecnico di Milano Partial Reconfiguration Research Initiatives

Design flows

Towards distributed FPGA-based systems

Virtualized Execution Runtime for FPGA Accelerators in the Cloud [suggested readings]

A cloud-scale acceleration architecture [suggested readings]

Enabling Flexible Network FPGA Clusters in a Heterogeneous Cloud Data Center [suggested readings]

Conclusion

Closing remarks and future directions