University of Colorado Boulder - Introduction to FPGA Design for Embedded Systems
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- Public/Government Institute
Introduction to FPGA Design for Embedded Systems at Coursera Overview
Duration | 18 hours |
Total fee | Free |
Mode of learning | Online |
Difficulty level | Intermediate |
Official Website | Explore Free Course  |
Credential | Certificate |
Introduction to FPGA Design for Embedded Systems at Coursera Highlights
- Shareable Certificate Earn a Certificate upon completion
- 100% online Start instantly and learn at your own schedule.
- Course 1 of 4 in the FPGA Design for Embedded Systems Specialization
- Flexible deadlines Reset deadlines in accordance to your schedule.
- Intermediate Level
- Approx. 18 hours to complete
- English Subtitles: Arabic, French, Portuguese (European), Italian, Vietnamese, German, Russian, English, Spanish
Introduction to FPGA Design for Embedded Systems at Coursera Course details
- This course can also be taken for academic credit as ECEA 5360, part of CU Boulder?s Master of Science in Electrical Engineering degree.
- Programmable Logic has become more and more common as a core technology used to build electronic systems. By integrating soft-core or hardcore processors, these devices have become complete systems on a chip, steadily displacing general purpose processors and ASICs. In particular, high performance systems are now almost always implemented with FPGAs.
- This course will give you the foundation for FPGA design in Embedded Systems along with practical design skills. You will learn what an FPGA is and how this technology was developed, how to select the best FPGA architecture for a given application, how to use state of the art software tools for FPGA development, and solve critical digital design problems using FPGAs. You use FPGA development tools to complete several example designs, including a custom processor. If you are thinking of a career in Electronics Design or an engineer looking at a career change, this is a great course to enhance your career opportunities.
- Hardware Requirements:
- You must have access to computer resources to run the development tools, a PC running either Windows 7, 8, or 10 or a recent Linux OS which must be RHEL 6.5 or CentOS Linux 6.5 or later. Either Linux OS could be run as a virtual machine under Windows 8 or 10. The tools do not run on Apple Mac computers. Whatever the OS, the computer must have at least 8 GB of RAM. Most new laptops will have this, or it may be possible to upgrade the memory.
Introduction to FPGA Design for Embedded Systems at Coursera Curriculum
What's this programmable logic stuff anyway? History and Architecture
Course Introduction
Course Overview
1. Welcome to the world of programmable logic and FPGA design
2. A Brief History of Programmable Logic
3. CPLD Architecture
4. LUTs and FPGA Architecture
5. LUTs for Logic Design
6. Designing Adders
7. Designing Multipliers
About This Course
Hardware Requirements
Introduction to FPGA Design for Embedded Systems Assessment Strategy
Week 1 Suggested Readings
Week 2 Assignment Instructions and Files
Mission 002: Week 1 Quiz
FPGA Design Tool Flow; An Example Design
1. The FPGA Design Flow
2. Downloading Quartus Prime
3. Installing Quartus Prime
4. Introducing Quartus Prime
5. Create a design project in Quartus Prime
6. Create a design in Quartus Prime
7. Compile a Design
8. View the RTL
9. Timing Analysis with Time Quest I
10. Timing Analysis with Time Quest II
11. Simulate a design with ModelSim
Week 2 Suggested Readings
Mission 003 : Practice Opportunity
Mission 005: Week 2 Quiz
FPGA Architectures: SRAM, FLASH, and Anti-fuse
1. Many types of FPGAs
2. Xilinx CPLD Architecture
3. Xilinx Small FPGAs
4. Xilinx Large FPGAs
5. Altera CPLDs and Small FPGAs
6. Altera Large FPGAs
7. Microsemi Single-chip FPGA solutions
8. Lattice Single-Chip FPGA solutions
Week 3 Suggested Readings
Week 4 Assignment Instructions and Files
Mission 006: Week 3 Quiz
Programmable logic design using schematic entry design tools
1. FPGA Design Expertise
2. Advanced Schematic Entry for FPGA Design- Drawing and Hierarchy
3. Improving Productivity with IP Blocks
4. Improving Timing with Pipelining
5. FPGA IO: Getting In and Getting Out
6. Pin Assignments: Making them Spot On!
7. Programming the FPGA
8. Becoming one with Q: Qsys System Design
9.a Becoming one with Q Part II: Qsys System Design Finishing Touches
9.b Becoming one with Q Part III: Qsys System Design Finishing Touches
Week 4 Suggested Readings
Mission 008: Week 4 Quiz
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