Semiconductor Electronics: Materials, Devices and

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New answer posted

4 months ago

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P
Payal Gupta

Contributor-Level 10

IL=VRL=51kΩ

lL=5*103A=5mA

New answer posted

4 months ago

0 Follower 2 Views

V
Vishal Baghel

Contributor-Level 10

Ib = 10 µA

IC = 1.5 mA

RL = 50 kW or (Rc)

Base – emitter voltage = 10 mv

R B = V B I B = 1 0 * 1 0 3 1 0 * 1 0 6 = 1 0 3 Ω

A v = ( Δ l C Δ l B ) * ( R C R B )

= 1 . 5 * 1 0 3 1 0 * 1 0 6 * 5 * 1 0 3 1 0 3  

Av = 750

New answer posted

4 months ago

0 Follower 6 Views

P
Payal Gupta

Contributor-Level 10

According to Work energy theorem, we can write

KfKi=WElectricForce12mv212mv02=eVv2=v022eVm

v2= (6.0*105)22*1.6*10199*1031=3241289*1010=1969*1010V=143*105m/s

New answer posted

4 months ago

0 Follower 7 Views

A
alok kumar singh

Contributor-Level 10

Given

VL = VC = 2VR, f = 50Hz

L=1kπmH

since, VL = VC.

then

Vnet= (VLVC)2+ (VR)2

VR = VNet = 220V

I = VNetZ=220 (XLXC)2+122

I=44A

VL=IxL=2vR

= I xL = 440

xL = 10

WL = 10

2πfL = 10

L=11100πk=1100=0.010

 

New answer posted

4 months ago

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A
alok kumar singh

Contributor-Level 10

Kindly go through the solution

 

New answer posted

6 months ago

0 Follower 23 Views

A
Aayush Kumari

Beginner-Level 5

 A p-type semiconductor is electrically neutral despite having more holes, because the number of positively charged holes is exactly balanced/equal by the number of negatively charged acceptor ions introduced during doping. so practically untill any volatage is applied the semiconductor remains chargeless in other words doesn't produce any current even after doping.

 As per the NCERT Textbooks information"Although the number of holes is more than the number of electrons in a p-type semiconductor, the material as a whole is electrically neutral because the charge of holes is balanced by the negatively charged acceptor ions.”

New answer posted

6 months ago

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N
Nishtha Datta

Beginner-Level 5

As per NCERT Textbboks"If forward current is too large, it can produce large heating and damage the junction. So, a resistor is used in series with the diode to limit the current in the circuit.

It means when a semiconductor diode is connected to a source under high current it causes excess heat due to more electrical energy. This excess heat is responsible to damage the junction in semiconductor diode permanently. Student can check out NCERT Solutions for Semicondutor Electronics of class 12 physics.  

 

New answer posted

6 months ago

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P
Payal Gupta

Contributor-Level 10

14.15 A acts as two inputs of the NOR gate and Y is the output. As shown in the following figure. Hence the output of the circuit is A + A ? = A ?

The truth table for the same is given as:

A

Y = ( A ? )

0

1

1

0

This is the truth table of a NOT gate. Hence, this circuit functions as a NOT gate.

A and B are the inputs and Y is the output of the given circuit. By using the result obtained in solution (a), we can infer that the outputs of the first two NOR gates are A ? and B ?  , as shown in the following figure

Above is given the inputs for the last NOR gate.

Hence, the output for the circuit can be written as:

Y = A + B ? = A ? . B ? ?   = A.B

The truth table for the same can b

...more

New answer posted

6 months ago

0 Follower 9 Views

P
Payal Gupta

Contributor-Level 10

14.14 A and B are the inputs of the given circuit. The output of the first NOR gate is A ? +B? . It can be observed from the following figure that the inputs of the second NOR gate become the output of the first one.

Hence, the output of the combination is given as:

Y = A + B ? + A + B ? ?  =  A ? . B ? ?  + A ? . B ? ?    = = A ? . B ? ?    = A ?  + B ?  = A + B ?

The truth table for this operation is given as:

This is the truth table of an or gate. Hence, this circuit functions as an or gate.

A

B

Y ( = A + B)

0

0

0

0

1

1

1

0

1

1

1

1

This is the truth table of an OR gate. Hence, this circuit functions as an OR gate.

New answer posted

6 months ago

0 Follower 5 Views

P
Payal Gupta

Contributor-Level 10

14.13 The output of the left NAND gate will be A . B ? , as shown in the following figure:

Hence, the output of the combination of two NAND gates is given as:

Y = ( A . B ? ).( A . B ? ) = A . B ? + A . B ?  = AB

Hence the circuit functions as an AND gate.

A ? is the output of the upper left of the NAND gate and B ?  is the output of the lower half of the NAND gate, as shown in the following figure.

Hence, the output of the combination of the NAND gates will be given as:

Y = A ? . B ?  = A ? + B ?  = A + B

Hence, this circuit functions as an OR gate.

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