IIT Madras Unveils Indigenous Silicon Photonics Products; Launched by MeitY Secretary S. Krishnan

MeitY Secretary S. Krishnan, IAS, launched Silicon Photonics products that were indigenously developed at the Centre of Excellence for Centre for Programmable Photonic Integrated Circuits and Systems (CoE-CPPICS), IIT Madras.

IIT Madras Unveils Indigenous Silicon Photonics Products

S. Krishnan, Secretary, Ministry of Electronics and Information Technology (MeitY), Government of India, launched two indigenously designed and developed Silicon Photonics products at the Centre of Excellence for Programmable Photonic Integrated Circuits and Systems (CoE-CPPICS), Indian Institute of Technology (IIT) Madras. The launch took place on the eve of an industry stakeholders’ meeting, jointly convened by Chief Investigator Prof. Bijoy Krishna Das and MeitY Scientist Project-in-Charge Dr. Sankhadip Das.

The CoE-CPPICS at IIT Madras is a one-of-a-kind facility in India that adopts a comprehensive Product Research, Development, and Manufacturing (PRDM) model, leveraging silicon photonics technology compatible with the CMOS fabrication process. The Centre aims to build end-to-end capabilities across all verticals of the silicon photonics manufacturing ecosystem through focused R&D, while fostering the growth of the Indian photonics industry to meet both domestic and global market demands.

S. Krishnan, Secretary, MeitY launched two Silicon Photonics products

Fiber-Array Unit (FAU) Attachment Tool for Photonic Chip Packaging:

The CoE-CPPICS team at IIT Madras has developed a cutting-edge Fiber Array Attachment Tool in collaboration with the leadership and engineers of M/s Izmo. This innovative tool can be seamlessly integrated into Izmo’s advanced packaging facility, enabling next-generation photonic chip packaging. The world-class packaging facility at Izmo Microsystems is now commercially available to support the development of miniaturized silicon photonics products.

Silicon Photonic Quantum Random Number Generator (QRNG):

The second product launched is a high-speed Silicon Photonics-based Quantum Random Number Generator (QRNG). A live demonstration showcased its successful deployment at the Society for Electronic Transactions and Security (SETS), Chennai. SETS scientists and engineers integrated the CPPICS QRNG module into their secured server infrastructure to enhance cryptographic services for end users.

Congratulating CoE-CPPICS on these two products, S. Krishnan, IAS, Secretary, MeitY, Government of India, said, “Indigenously developed field deployable silicon photonic-based quantum random number generator (QRNG) module is pride for India. The product has been delivered to DRDO to help in advanced quantum cryptography.”

Speaking earlier, Prof. V. Kamakoti, Director, IIT Madras, said, “Silicon Photonics is an emerging technology that will certainly help design much more efficient and complex hardware for the future. I am very happy that the Silicon Photonics CoE-CPPICS Centre at IIT Madras has now come out with demonstrable products that can be quickly adopted by the market. We hope that multiple such products will continue to come in the future.”

Highlighting the importance of these two product launches to the country, Prof. Bijoy Krishna Das, Chief Investigator, Silicon Photonics CoE-CPPICS, IIT Madras, said, “We are now fully equipped with the entire value chain of silicon photonics product development by leveraging the strongest silicon photonics research team and the world class silicon photonics chip design and testing facility at CPPICS along with its state-of-the-art Silicon Photonics Foundry Partner Silterra Malaysia, and Photonic IC Packaging Partner izmo Microsystems”.

The immediate focus of CoE-CPPICS at IIT Madras is to deliver advanced solutions for microwave and quantum photonics applications. These include the development of high-performance photonic processors for RF transceivers, scalable linear optical quantum computing processors for next-generation qubit operations, and chip-level circuits for quantum key generation and distribution. The Centre is also actively working on creating indigenous photonic integrated circuit (PIC) design rules and establishing precision packaging infrastructure to support system-level deployments.

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