

M.Tech. in VLSI and Embedded Systems Design
- Public/Government Institute
- Estd. 1989
M.Tech. in VLSI and Embedded Systems Design at NIELIT Gorakhpur Overview
National Institute of Electronics and Information Technology, Gorakhpur provides M.Tech. in VLSI and Embedded Systems Design at the PG level. This is a 2 years course with the total tuition fee of INR 1,28,000. The total fee has several components such as admission fee, application fee and tuition fee. Students can check more details on M.Tech. in VLSI and Embedded Systems Design offered at National Institute of Electronics and Information Technology, Gorakhpur in the table provided below:
Total Tuition Fees | ₹1.28 Lakh Get Fees details |
Duration | 2 years |
Course Level | PG Degree |
Mode of Course | Full Time |
Official Website | Go to Website |
Seat breakup | 9 |
Type of University | Public/Government,Autonomous |
M.Tech. in VLSI and Embedded Systems Design at NIELIT Gorakhpur Fees
For the total course duration, the NIELIT Gorakhpur M.Tech. in VLSI and Embedded Systems Design tuition fees is INR 1,28,000. Apart from this, the students opting for the hostel facility have to pay INR 41,800, which includes security deposite, and mess charges. Take a look at the table below for NIELIT Gorakhpur M.Tech. in VLSI and Embedded Systems Design fees break-up:
| Fee components | Amount (2 years) |
|---|---|
The mentioned fee is as per AFRC UP. | ₹ 1.28 Lakh |
The fees might include components other than hostel fees. Meal Plan is included in mentioned fee. | ₹ 41,800 |
One-time payment includes Caution Money Library/Lab, Connectivity Charges, etc. | ₹ 6,200 |
₹ 1.76 Lakh |
M.Tech. in VLSI and Embedded Systems Design at NIELIT Gorakhpur Frequently Asked Questions
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M.Tech. in VLSI and Embedded Systems Design at NIELIT Gorakhpur Entry Requirements
M.Tech. in VLSI and Embedded Systems Design at NIELIT Gorakhpur Admission Process
- Register and ApplyInterested candidates can apply online with the required information.
- Merit ScreeningAdmission is based on the score obtained in GATE (Graduate Aptitude Test in Engineering). In case of non-availability of GATE candidate for vacant seats, admission will be based on the score obtained in PG entrance examination conducted by the university.
Important Dates
M.Tech. in VLSI and Embedded Systems Design at NIELIT Gorakhpur Cutoffs
CCMT round-wise cutoff Rank: (General-All India)
| Round | 2025 |
|---|---|
| 1 | 377 |
| 2 | 370 |
CCMT round-wise cutoff Rank: (OBC-All India)
| Round | 2025 |
|---|---|
| 1 | 342 |
| 2 | 334 |
GATE round-wise cutoff Rank: (General-All India)
| Round | 2025 |
|---|---|
| 1 | 377 |
| 2 | 370 |
GATE round-wise cutoff Rank: (OBC-All India)
| Round | 2025 |
|---|---|
| 1 | 342 |
| 2 | 334 |
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M.Tech. in VLSI and Embedded Systems Design at NIELIT Gorakhpur Contact Information
MMMUT University of Technology Campus,
Deoria Road
Gorakhpur ( Uttar Pradesh)
(For general query)
(For admission query)
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