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M.Tech. in Electronics and Communication Engineering (VLSI Design and Embedded Systems) 

  • A NAAC accredited
  • Private Institute
  • Estd. 1997

M.Tech. in Electronics and Communication Engineering (VLSI Design and Embedded Systems)
 at 
Faculty of Engineering and Technology 
Overview

Total Tuition Fees

₹2.90 Lakh
Get Fees details

Duration

2 years

Course Level

PG Degree

Mode of Course

Full Time

Official Website

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Type of University

Private
M.Tech. in Electronics and Communication Engineering (VLSI Design and Embedded Systems)
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M.Tech. in Electronics and Communication Engineering (VLSI Design and Embedded Systems)
 at 
Faculty of Engineering and Technology 
Fees

Fee componentsAmount (2 years)
₹ 2.90 Lakh
₹ 2.53 Lakh
₹ 3,000
₹ 1.33 Lakh
₹ 6.80 Lakh
Info IconThese are based on information available on various sources. Latest values may differ.
View scholarships

M.Tech. in Electronics and Communication Engineering (VLSI Design and Embedded Systems)
 at 
Faculty of Engineering and Technology 
 
Frequently Asked Questions

M.Tech. in Electronics and Communication Engineering (VLSI Design and Embedded Systems)
 at 
Faculty of Engineering and Technology 
 
Students also asked

Download exam sample paper

GATE
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M.Tech. in Electronics and Communication Engineering (VLSI Design and Embedded Systems)
 at 
Faculty of Engineering and Technology 
Placements

ParticularsStatistics (2024)
Highest SalaryINR 22.00 Lakh
Lock IconTop Recruiters for Faculty of Engineering and Technology
ACCENTURE
CapGemini
IBM
Infogain
Naukri Com
NOKIA
PayTM
Reliance Jio
Samsung
TATA Consultancy Services
View placement details

M.Tech. in Electronics and Communication Engineering (VLSI Design and Embedded Systems)
 at 
Faculty of Engineering and Technology 
Entry Requirements

General
Requirements for 12th gradeUp Arrow Icon
  • N/A
GraduationUp Arrow Icon
  • 50%
Other eligibility criteriaUp Arrow Icon

M.Tech. in Electronics and Communication Engineering (VLSI Design and Embedded Systems)
 at 
Faculty of Engineering and Technology 
Admission Process

  • Admission Process

Important Dates

ALL
COURSE
MRNAT
GATE
Nov 10 - 14, 2026
GATE 2027 Correction Window
Jan 4, 2027
GATE 2027 City Allotment Notification
Jan 9, 2027
GATE 2027 Admit CardTentative

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M.Tech. in Electronics and Communication Engineering (VLSI Design and Embedded Systems)
 at 
Faculty of Engineering and Technology 

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M.Tech. in Electronics and Communication Engineering (VLSI Design and Embedded Systems)
 at 
Faculty of Engineering and Technology 
 
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M.Tech. in Electronics and Communication Engineering (VLSI Design and Embedded Systems)
 at 
Faculty of Engineering and Technology 
Contact Information

Address

Plot A, Sector – 43, Aravalli Hills, Delhi – Surajkund Road
Faridabad ( Haryana)

Phone
01294198100

(For general query)

01294259000

(For admission query)

Email
info@mrei.ac.in

(For general query)

admissions@manavrachna.edu.in

(For admission query)

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